CID Signal Integrity & High-Speed Design 2

Question 1

What is the primary cause of inter-symbol interference (ISI) in high-speed serial links?

Accepted Answer

Frequency-dependent channel losses that cause pulse spreading

Answer

ISI occurs when frequency-dependent dielectric and skin-effect losses attenuate high-frequency components of a pulse, causing it to spread and interfere with adjacent bits.

Question 2

Which equalization technique is implemented in the transmitter to pre-compensate for channel loss in a serial link?

Accepted Answer

Feed-forward equalization (FFE) / de-emphasis

Answer

FFE/de-emphasis reduces the amplitude of repeated bits at the transmitter, effectively boosting the relative energy of transitions to compensate for high-frequency channel loss.

Question 3

A stripline trace has a propagation delay of 180 ps/inch. What is the approximate dielectric constant (Dk) of the surrounding material?

Accepted Answer

4.1

Answer

Propagation delay TD = 85 × √Dk ps/inch; solving for Dk gives (180/85)² ≈ 4.48, closest to 4.1 for standard FR4 in stripline.

Question 4

What is the effect of a poorly placed via anti-pad on differential pair routing?

Accepted Answer

It increases the differential impedance locally, causing mode conversion

Answer

An asymmetric or overly large anti-pad disrupts the reference plane locally and can create a differential-to-common-mode conversion point, degrading signal integrity.

Question 5

In a PCB stackup, which configuration provides the best EMI shielding for high-speed signals?

Accepted Answer

Signal layers sandwiched between adjacent reference planes on both sides

Answer

Embedding signal layers between tightly coupled reference planes minimizes radiated emissions by containing the electromagnetic field within the stackup.

(CID) Certified Interconnect Designer Practice Test

(CID) Certified Interconnect Designer Practice Test

CID Signal Integrity & High-Speed Design 2