CID Signal Integrity & High-Speed Design 2 — Questions and Answers
Question 1: What is the primary cause of inter-symbol interference (ISI) in high-speed serial links?
- Insufficient supply decoupling
- Frequency-dependent channel losses that cause pulse spreading (Correct answer)
- Excessive via stub length
- Impedance mismatch at the driver output
Correct answer: Frequency-dependent channel losses that cause pulse spreading
ISI occurs when frequency-dependent dielectric and skin-effect losses attenuate high-frequency components of a pulse, causing it to spread and interfere with adjacent bits.
Question 2: Which equalization technique is implemented in the transmitter to pre-compensate for channel loss in a serial link?
- Continuous time linear equalization (CTLE)
- Decision feedback equalization (DFE)
- Feed-forward equalization (FFE) / de-emphasis (Correct answer)
- Source series termination
Correct answer: Feed-forward equalization (FFE) / de-emphasis
FFE/de-emphasis reduces the amplitude of repeated bits at the transmitter, effectively boosting the relative energy of transitions to compensate for high-frequency channel loss.
Question 3: A stripline trace has a propagation delay of 180 ps/inch. What is the approximate dielectric constant (Dk) of the surrounding material?
- 2.1
- 3.0
- 4.1 (Correct answer)
- 5.2
Correct answer: 4.1
Propagation delay TD = 85 × √Dk ps/inch; solving for Dk gives (180/85)² ≈ 4.48, closest to 4.1 for standard FR4 in stripline.
Question 4: What is the effect of a poorly placed via anti-pad on differential pair routing?
- It increases the differential impedance locally, causing mode conversion (Correct answer)
- It has no effect if the traces are matched in length
- It reduces crosstalk between adjacent pairs
- It increases signal propagation speed
Correct answer: It increases the differential impedance locally, causing mode conversion
An asymmetric or overly large anti-pad disrupts the reference plane locally and can create a differential-to-common-mode conversion point, degrading signal integrity.
Question 5: In a PCB stackup, which configuration provides the best EMI shielding for high-speed signals?
- Signal layers on the outer layers with power planes in the center
- Signal layers sandwiched between adjacent reference planes on both sides (Correct answer)
- All signal layers grouped together with power planes on the outside
- Alternating signal and power layers without dedicated ground planes
Correct answer: Signal layers sandwiched between adjacent reference planes on both sides
Embedding signal layers between tightly coupled reference planes minimizes radiated emissions by containing the electromagnetic field within the stackup.
Question 6: What does the term 'skin depth' refer to in the context of conductor loss at high frequencies?
- The minimum trace width required to avoid mechanical cracking
- The depth below a conductor surface at which current density falls to 1/e of the surface value (Correct answer)
- The thickness of the PCB core material
- The copper roughness RMS value in micrometers
Correct answer: The depth below a conductor surface at which current density falls to 1/e of the surface value
Skin depth is the depth at which current density decreases to approximately 37% (1/e) of the surface value, and it decreases with increasing frequency, concentrating current at the surface.
Question 7: Which parameter in an S-parameter matrix describes the signal reflected back to port 1 when port 2 is properly terminated?
- S21
- S12
- S11 (Correct answer)
- S22
Correct answer: S11
S11 is the input reflection coefficient, representing the ratio of reflected wave amplitude to incident wave amplitude at port 1 with port 2 matched.
CID Signal Integrity & High-Speed Design 2
What is the primary cause of inter-symbol interference (ISI) in high-speed serial links?