CID Design for Testability & Reliability 3

Question 1

Conductive Anodic Filament (CAF) formation in a PCB is most directly associated with which design condition?

Accepted Answer

Insufficient spacing between drilled holes in high-humidity environments

Answer

CAF occurs when copper ions migrate along glass fiber-resin interfaces between closely spaced drilled holes under voltage bias and humidity, causing leakage or short circuits.

Question 2

What is the role of a 'test point' in PCB design for testability?

Accepted Answer

An accessible node allowing ICT or flying probe equipment to make electrical contact

Answer

Test points are dedicated pads or vias placed on nets to give automated test equipment reliable physical access for probing during manufacturing test.

Question 3

During accelerated life testing (ALT), Arrhenius equation is used to relate temperature to which factor?

Accepted Answer

Failure rate acceleration

Answer

The Arrhenius equation quantifies how elevated temperature accelerates chemical degradation failure mechanisms, providing an acceleration factor relative to use temperature.

Question 4

Which JTAG instruction is used to capture the logic state of all boundary scan cells from the normal circuit operation?

Accepted Answer

SAMPLE/PRELOAD

Answer

The SAMPLE/PRELOAD instruction captures current boundary scan cell values from the functional circuit into the data register without interrupting normal operation.

Question 5

A PCB designer is minimizing electromigration risk on a high-current signal trace. What is the most effective design action?

Accepted Answer

Widen the trace or add parallel traces to reduce current density

Answer

Electromigration risk decreases when current density is reduced by increasing conductor cross-section through wider traces or parallel routing.

(CID) Certified Interconnect Designer Practice Test

(CID) Certified Interconnect Designer Practice Test

CID Design for Testability & Reliability 3