CID Power Distribution & Grounding Flashcards

What is a ground pour (ground fill) and when should it be used with caution?

Answer: A method to flood unused PCB areas with copper connected to ground; should be avoided near high-speed differential pairs where it may alter impedance

Ground pours fill unused copper areas and can improve EMI shielding, but must be used carefully near controlled-impedance traces as they can alter the reference plane and change trace impedance.

What is the 'star ground' topology and when is it most appropriate?

Answer: A single-point ground where all return currents converge; most appropriate for low-frequency analog circuits to prevent ground loops

Star grounding uses a single common reference point, preventing ground loop currents and most commonly used in low-frequency analog and audio circuits.

How does via inductance affect a decoupling capacitor's performance?

Answer: It adds series inductance that raises the effective SRF and increases impedance at high frequencies

Via inductance adds series inductance in the decoupling loop, effectively raising the impedance and reducing the frequency range over which the capacitor is effective.

What is the significance of placing decoupling capacitors on the same side as the IC they serve?

Answer: It minimizes the current loop area between the IC power pins and the capacitor, reducing inductance

Same-side placement minimizes the current loop area between IC power pins and the decoupling capacitor, directly reducing the parasitic inductance of the decoupling path.

What is a voltage regulator module (VRM) and what frequency range does it typically manage in a PDN?

Answer: An active switching power supply; manages low-frequency load variations typically below 1 MHz

A VRM is an active DC-DC converter that responds to load variations at frequencies typically below 1 MHz, with bulk and ceramic capacitors handling higher-frequency transients.

Which technique helps reduce simultaneous switching noise (SSN) in high-speed digital PCBs?

Answer: Using adequate decoupling, minimizing return path inductance, and staggering signal switching times

SSN is reduced by combining proper decoupling, minimizing ground/power inductance, and where possible staggering the switching of outputs to reduce peak current demands.