CET Digital Electronics and Systems 2

Question 1

Which logic family typically offers the lowest power consumption in static (non-switching) conditions?

Accepted Answer

CMOS

Answer

CMOS draws near-zero static current because both PMOS and NMOS transistors are never simultaneously conducting in steady state.

Question 2

A 4-bit ripple carry adder adds two 4-bit numbers. What is the maximum number of gate delays before the final sum is valid?

Accepted Answer

9

Answer

Each full adder stage adds 2 gate delays for the carry, so 4 stages give 8 carry delays plus 1 final sum delay = 9 total.

Question 3

In a JK flip-flop, what state does the output enter when both J=1 and K=1 on a clock edge?

Accepted Answer

Toggle

Answer

When J=K=1, the JK flip-flop toggles its output on each active clock edge, solving the indeterminate state of the SR flip-flop.

Question 4

A 3-to-8 line decoder with active-low outputs is used to select memory chips. How many address lines does it require?

Accepted Answer

3

Answer

A 3-to-8 decoder uses 3 binary address inputs to activate one of 8 output lines, enabling selection of up to 8 memory chips.

Question 5

Which Boolean expression correctly represents a 2-input XNOR gate?

Accepted Answer

AB + A'B'

Answer

XNOR outputs HIGH when both inputs are equal: AB (both HIGH) or A'B' (both LOW), so the expression is AB + A'B'.

(CET) Certified Electronics Technician Practice Test