ISCET Digital Systems & Microprocessors 4

Question 1

What is the output of a tri-state buffer when its enable input is deasserted?

Accepted Answer

High impedance (Hi-Z)

Answer

When disabled, a tri-state buffer places its output in a high-impedance state, effectively disconnecting it from the bus.

Question 2

In a synchronous counter, what distinguishes it from an asynchronous (ripple) counter?

Accepted Answer

All flip-flops are clocked simultaneously

Answer

In a synchronous counter, all flip-flops share the same clock signal and change state simultaneously, eliminating ripple delay.

Question 3

Which microprocessor bus carries the memory location or I/O port being accessed?

Accepted Answer

Address bus

Answer

The address bus carries the binary address output by the CPU to select a specific memory location or I/O device.

Question 4

What is the Boolean expression for a 2-input XNOR gate?

Accepted Answer

AB + A'B'

Answer

An XNOR gate outputs HIGH when both inputs are equal: AB + A'B' (both HIGH or both LOW).

Question 5

In a microprocessor's pipeline architecture, what is a 'pipeline stall' (bubble)?

Accepted Answer

A clock cycle wasted because the pipeline cannot proceed

Answer

A pipeline stall (bubble) occurs when a stage cannot complete its task in one clock cycle, forcing downstream stages to wait and wasting cycles.

(ISCET) International Society of Certified Electronics Technicians Practice Test