B CompE Bachelor of Computer Engineering Bachelor of Computer Engineering Microprocessor 4

Question 1

Which interrupt handling technique saves the program counter and status register automatically on the stack before branching to the ISR?

Accepted Answer

Vectored interrupt with hardware context save

Answer

Vectored interrupts with hardware context save automatically push the return address and flags to the stack so the ISR can execute and return cleanly.

Question 2

What is the primary advantage of register windowing, as used in SPARC processors?

Accepted Answer

Speeds up procedure calls by avoiding expensive register saves to memory

Answer

Register windows provide each procedure with its own set of registers, eliminating most register spill/fill traffic to memory on function calls.

Question 3

In a 32-bit microprocessor with byte-addressable memory and 4-byte words, little-endian storage places the least significant byte at:

Accepted Answer

The lowest address of the word

Answer

Little-endian systems store the least significant byte at the lowest (base) memory address of a multi-byte value.

Question 4

The Tomasulo algorithm in out-of-order processors uses reservation stations primarily to:

Accepted Answer

Eliminate WAR and WAW hazards through register renaming

Answer

Tomasulo's algorithm uses reservation stations and register renaming to eliminate write-after-read (WAR) and write-after-write (WAW) hazards, enabling out-of-order execution.

Question 5

In the context of microprocessor reset, what is the state of the program counter immediately after a cold reset on most RISC processors?

Accepted Answer

It is loaded from a fixed reset vector address defined by the architecture

Answer

On reset, most RISC processors load the program counter from a predefined reset vector (e.g., 0xFFFFFFFC on ARM Cortex-M) specified by the architecture.

B CompE Bachelor of Computer Engineering Practice Test

B CompE Bachelor of Computer Engineering Practice Test

B CompE Bachelor of Computer Engineering Bachelor of Computer Engineering Microprocessor 4