B CompE Bachelor of Computer Engineering Bachelor of Computer Engineering Microprocessor 2

Question 1

In a pipelined microprocessor, a data hazard occurs when:

Accepted Answer

An instruction depends on the result of a previous instruction not yet written back

Answer

A data hazard arises when an instruction needs a value that a prior instruction has not yet completed writing to a register.

Question 2

Which addressing mode uses the content of a register as the effective memory address?

Accepted Answer

Register indirect addressing

Answer

Register indirect addressing uses the value stored in a specified register as the pointer to the actual memory location.

Question 3

The purpose of a Translation Lookaside Buffer (TLB) in a microprocessor is to:

Accepted Answer

Cache frequently used virtual-to-physical address mappings

Answer

The TLB caches recent virtual-to-physical address translations to avoid repeated page-table walks, speeding up memory accesses.

Question 4

What is the function of the barrel shifter in an ARM Cortex-M processor?

Accepted Answer

It performs multi-bit shift or rotation in a single clock cycle

Answer

The barrel shifter allows ARM to shift or rotate an operand by any number of bits in one cycle, enabling efficient multiply-by-constant operations.

Question 5

In the x86 architecture, which flag is set when the result of an unsigned arithmetic operation exceeds the maximum representable value?

Accepted Answer

Carry Flag (CF)

Answer

The Carry Flag (CF) indicates a carry out of the most significant bit, signaling unsigned overflow.

B CompE Bachelor of Computer Engineering Practice Test