Bachelor of Computer Engineering Microprocessor Flashcards

In a Harvard architecture microcontroller, which statement is correct?

Answer: Program and data memory use separate buses

Harvard architecture uses physically separate buses for instruction memory and data memory, allowing simultaneous access to both.

The 8051 microcontroller's Program Status Word (PSW) register contains which of the following?

Answer: Carry, auxiliary carry, overflow, and register bank select bits

The 8051 PSW holds status flags including Carry (CY), Auxiliary Carry (AC), Overflow (OV), and the RS0/RS1 register bank select bits.

What does the term 'superscalar' mean in microprocessor design?

Answer: Multiple instructions are issued and executed simultaneously each clock cycle

A superscalar processor can issue and execute more than one instruction per clock cycle by using multiple parallel execution units.

In DMA (Direct Memory Access) operation, the CPU relinquishes control of the bus during which phase?

Answer: Bus arbitration and DMA transfer

During DMA transfer, the DMA controller requests the bus via a hold/acknowledge handshake, and the CPU tri-states its bus signals while the DMA moves data.

Which cache write policy writes data to both the cache and main memory simultaneously on every write hit?

Answer: Write-through

Write-through policy updates main memory on every write, keeping it consistent with the cache at the cost of higher memory bandwidth.

In ARM Thumb instruction set, instructions are encoded as:

Answer: 16-bit fixed-length words

Thumb instructions use a 16-bit encoding to reduce code size, trading some flexibility compared to the full 32-bit ARM encoding.

What is the purpose of the LOCK prefix in x86 assembly?

Answer: Prevent other processors from accessing memory during a read-modify-write operation

The LOCK prefix asserts the LOCK# signal on the bus, ensuring atomic read-modify-write operations in a multiprocessor environment.