SACA Programmable Logic Controllers 5 — Questions and Answers
Question 1: Which PLC scan phase occurs AFTER the program logic is executed?
- Input image table update
- Output image table update and write to outputs (Correct answer)
- Watchdog timer reset
- Communication service
Correct answer: Output image table update and write to outputs
After program logic execution, the PLC writes the output image table values to the physical output modules to update field devices.
Question 2: What is the function of a PLC's retentive coil (or latching coil)?
- It resets automatically at the end of each scan cycle
- It maintains its state even when its enabling condition goes false (Correct answer)
- It pulses for exactly one scan cycle when triggered
- It can only be energized by a dedicated hardware switch
Correct answer: It maintains its state even when its enabling condition goes false
A retentive (latching) coil maintains its energized state even after the enabling rung condition goes false, until explicitly unlatched.
Question 3: In an Allen-Bradley ControlLogix PLC, what does the tag-based addressing system offer compared to traditional register-based addressing?
- Faster scan cycle times due to reduced memory overhead
- Descriptive named variables that improve program readability and maintainability (Correct answer)
- Direct hardware mapping that eliminates the need for I/O modules
- Automatic error correction for out-of-range values
Correct answer: Descriptive named variables that improve program readability and maintainability
Tag-based addressing uses descriptive named variables instead of cryptic register numbers, greatly improving program readability and long-term maintainability.
Question 4: What is the purpose of the 'force' function available in most PLC programming software?
- To override normal program logic and manually set an I/O point to a desired state for testing (Correct answer)
- To increase the processor clock speed during debugging
- To permanently lock a rung of logic from being modified
- To synchronize scan cycles across multiple PLCs
Correct answer: To override normal program logic and manually set an I/O point to a desired state for testing
The force function allows technicians to manually override I/O points to a specific state for troubleshooting, bypassing normal program logic.
Question 5: A CTD (Count Down) instruction in a PLC has a preset of 10 and an accumulated value of 3. How many more count pulses are needed to set the Done bit?
- 7
- 3 (Correct answer)
- 10
- 13
Correct answer: 3
A CTD instruction counts down from the accumulated value; the Done bit sets when accumulated reaches zero, so 3 more pulses are needed.
Question 6: Which PLC network protocol is commonly used for device-level communication with sensors and actuators in a factory floor environment?
- HTTP/HTTPS
- DeviceNet or PROFIBUS DP (Correct answer)
- FTP
- SMTP
Correct answer: DeviceNet or PROFIBUS DP
DeviceNet and PROFIBUS DP are fieldbus protocols designed for device-level communication between PLCs and field devices such as sensors and actuators.
Question 7: What is 'structured text' (ST) in the context of IEC 61131-3 PLC programming?
- A graphical language using ladder rungs
- A high-level textual language similar to Pascal used to write PLC logic (Correct answer)
- A method for organizing ladder diagram rungs into subroutines
- A binary instruction set used for low-level PLC programming
Correct answer: A high-level textual language similar to Pascal used to write PLC logic
Structured Text (ST) is a high-level, Pascal-like textual programming language defined in IEC 61131-3 for writing complex PLC control logic.
SACA Programmable Logic Controllers 5
Which PLC scan phase occurs AFTER the program logic is executed?