BEE Bachelor of Electrical Engineering Digital Logic and Systems Questions and Answers

Question 1

Which of the following statements accurately describes a key difference between a ripple counter (asynchronous) and a synchronous counter?

Accepted Answer

In a ripple counter, the clock input of subsequent flip-flops is triggered by the output of the preceding flip-flop, while in a synchronous counter, all flip-flops are triggered by a common clock signal.

Answer

The primary distinction lies in the clocking mechanism. In an asynchronous or ripple counter, only the first flip-flop is connected to the external clock. Subsequent flip-flops are clocked by the output of the previous one, causing a 'ripple' effect. In a synchronous counter, all flip-flops share a common clock signal and change state simultaneously, eliminating the cumulative propagation delay found in ripple counters.

Question 2

A digital systems engineer needs to represent the decimal value -25 in an 8-bit signed binary format. Using the two's complement method, what is the correct binary representation?

Accepted Answer

11100111

Answer

To find the two's complement of -25: First, represent +25 in 8-bit binary: 00011001. Second, invert all the bits (one's complement): 11100110. Third, add 1 to the result: 11100110 + 1 = 11100111. This is the 8-bit two's complement representation of -25.

Question 3

In a digital logic circuit, what is the primary functional difference between a combinational circuit and a sequential circuit?

Accepted Answer

A combinational circuit's output depends solely on its current inputs, while a sequential circuit's output depends on both current inputs and its previous state.

Answer

A combinational circuit's output is a pure function of its present input values only, with no memory of past inputs. In contrast, a sequential circuit contains memory elements (like flip-flops or latches), and its output depends not only on the current inputs but also on the stored information from previous states.

Question 4

Applying De Morgan's theorem to the Boolean expression (A + B)' ⋅ C simplifies to which of the following expressions?

Accepted Answer

A' ⋅ B' ⋅ C

Answer

De Morgan's first theorem states that the complement of a sum is equal to the product of the complements, i.e., (X + Y)' = X' ⋅ Y'. Applying this to the (A + B)' part of the expression gives A' ⋅ B'. The original expression then becomes A' ⋅ B' ⋅ C.

Question 5

A design requires a logic circuit that can store one bit of data and is triggered by a clock signal. However, a known issue with simple JK flip-flops, the 'race-around condition,' must be avoided. Which of the following digital logic components is specifically designed to solve this problem?

Accepted Answer

Master-Slave JK Flip-Flop

Answer

The Master-Slave JK Flip-Flop was developed to eliminate the race-around condition that can occur in a standard JK flip-flop when both J and K inputs are high. It consists of two flip-flops, a 'master' and a 'slave', which are clocked on opposite edges or levels of the clock signal. This ensures that the output only changes once per clock cycle, providing stable and predictable toggling.

BEE - Bachelor of Electrical Engineering Practice Test

BEE - Bachelor of Electrical Engineering Practice Test

BEE Bachelor of Electrical Engineering Digital Logic and Systems Questions and Answers