NCA Performance Optimization & Debugging 5

Question 1

What is the purpose of the CUDA Occupancy Calculator and when should it be used?

Accepted Answer

To determine optimal block size that maximizes active warps per SM given resource usage

Answer

The Occupancy Calculator (available via cudaOccupancyMaxPotentialBlockSize API or as a spreadsheet) helps find the thread block size that maximizes SM occupancy given register and shared memory constraints.

Question 2

Which technique allows overlapping CPU computation with GPU kernel execution in CUDA?

Accepted Answer

Launching kernels into non-default streams and continuing CPU work before synchronizing

Answer

Asynchronous kernel launches into non-default streams return control to the CPU immediately, allowing CPU code to execute in parallel with GPU computation until an explicit sync is needed.

Question 3

A matrix multiplication kernel shows poor performance due to global memory access patterns. Tiling using shared memory improves it. What is the key principle behind this optimization?

Accepted Answer

Reusing data loaded into shared memory multiple times reduces total global memory traffic

Answer

Tiling loads a sub-matrix into shared memory once and reuses it for all dot products in that tile, converting many global reads into fast on-chip shared memory accesses.

Question 4

In Nsight Systems, a developer sees that GPU utilization drops to 0% for several milliseconds between two kernels. Which action best eliminates this gap?

Accepted Answer

Pipeline the workload using CUDA streams so the next kernel launches before the previous one completes

Answer

Pipelining with CUDA streams lets the CPU enqueue the next kernel while the current one is still running, eliminating idle gaps caused by sequential launch and synchronization patterns.

Question 5

What is the consequence of shared memory bank conflicts on GPU performance?

Accepted Answer

Accesses to the same bank by different threads in a warp are serialized, reducing effective bandwidth

Answer

When multiple threads in a warp access different addresses within the same shared memory bank, those accesses are serialized into multiple cycles, reducing the effective shared memory throughput.

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NCA Performance Optimization & Debugging 5