NCA CUDA Programming & Parallel Computing 4 — Questions and Answers
Question 1: What is the role of a Streaming Multiprocessor (SM) in NVIDIA GPU architecture?
- It handles PCIe communication between CPU and GPU
- It is the basic compute unit that executes thread blocks and manages warps (Correct answer)
- It stores the L2 cache shared across the GPU
- It controls memory transfers between global and shared memory
Correct answer: It is the basic compute unit that executes thread blocks and manages warps
An SM is the fundamental processing unit on a GPU, containing CUDA cores, schedulers, and registers that execute thread blocks.
Question 2: What is coalesced memory access in CUDA?
- Accessing constant memory with all threads
- Threads in a warp accessing consecutive aligned memory locations in a single transaction (Correct answer)
- Using shared memory instead of global memory
- Prefetching data before it is needed
Correct answer: Threads in a warp accessing consecutive aligned memory locations in a single transaction
Coalesced access occurs when consecutive threads access consecutive memory addresses, allowing the memory controller to serve the entire warp in one or few transactions.
Question 3: Which CUDA feature allows kernels and memory transfers to overlap for better throughput?
- Unified memory
- CUDA streams (Correct answer)
- Warp scheduling
- Texture caching
Correct answer: CUDA streams
CUDA streams enable concurrent execution of kernels and asynchronous memory transfers, allowing overlap to hide latency.
Question 4: What does the __device__ function qualifier indicate?
- The function runs on host and device
- The function is called from the host but runs on the device
- The function runs on the device and can only be called from device code (Correct answer)
- The function is a kernel launch entry point
Correct answer: The function runs on the device and can only be called from device code
__device__ functions execute on the GPU and are callable only from other device or global functions, not from host code.
Question 5: In the context of CUDA atomics, what problem do they solve?
- Prevent warp divergence
- Ensure race-condition-free read-modify-write operations on shared or global memory (Correct answer)
- Speed up shared memory access
- Allow threads to synchronize across blocks
Correct answer: Ensure race-condition-free read-modify-write operations on shared or global memory
Atomic operations guarantee that read-modify-write sequences complete without interference from other threads, preventing data races.
Question 6: What is unified memory in CUDA?
- Shared memory accessible by all blocks simultaneously
- A single address space accessible by both CPU and GPU, managed automatically (Correct answer)
- L2 cache shared across all SMs
- Pinned host memory mapped to the device
Correct answer: A single address space accessible by both CPU and GPU, managed automatically
Unified memory creates a single pointer that both host and device can dereference, with the CUDA runtime handling data migration automatically.
Question 7: What is the purpose of pinned (page-locked) host memory in CUDA?
- To prevent the OS from swapping it to disk, enabling faster DMA transfers (Correct answer)
- To share memory between two GPU devices
- To give device code direct access to host variables
- To eliminate the need for cudaMemcpy
Correct answer: To prevent the OS from swapping it to disk, enabling faster DMA transfers
Pinned memory is locked in physical RAM so the DMA engine can transfer it to/from the GPU at higher bandwidth without OS page faults.
NCA CUDA Programming & Parallel Computing 4
What is the role of a Streaming Multiprocessor (SM) in NVIDIA GPU architecture?