ISCET Digital Electronics Principles 3 — Questions and Answers
Question 1: In two's complement representation using 8 bits, what is the decimal value of 11110000₂?
- -16 (Correct answer)
- -15
- 240
- -8
Correct answer: -16
11110000₂ in two's complement: invert to 00001111 (15) then add 1 = 16, so the value is −16.
Question 2: Which type of counter produces a modulus that is not a power of two by using feedback to skip states?
- Ring counter
- Johnson counter
- Modulo-N counter (Correct answer)
- Ripple counter
Correct answer: Modulo-N counter
A modulo-N counter uses decode-and-reset or feedback logic to count to N−1 then recycle, regardless of whether N is a power of two.
Question 3: What is the primary purpose of a tri-state buffer in a digital bus system?
- Amplify logic signals
- Allow multiple devices to share one bus line without conflict (Correct answer)
- Convert analog to digital
- Store a single bit
Correct answer: Allow multiple devices to share one bus line without conflict
A tri-state buffer can be disabled to a high-impedance state, letting multiple drivers share a bus without logic conflicts.
Question 4: Apply De Morgan's theorem to simplify (A·B)':
- A'·B'
- A'+B' (Correct answer)
- A+B
- A'·B
Correct answer: A'+B'
De Morgan's theorem states (A·B)' = A' + B': the complement of a product is the sum of the complements.
Question 5: Which flip-flop condition is considered FORBIDDEN in an S-R (Set-Reset) latch?
- S=0, R=0
- S=1, R=0
- S=0, R=1
- S=1, R=1 (Correct answer)
Correct answer: S=1, R=1
When both S=1 and R=1, the latch enters an indeterminate state because both outputs try to be active simultaneously.
Question 6: A 4-bit binary ripple counter has a maximum count of:
- 15 (Correct answer)
- 16
- 8
- 14
Correct answer: 15
A 4-bit counter counts from 0000 to 1111 (0–15), giving 16 states with a maximum count of 15.
Question 7: What logic function does a full adder perform that a half adder cannot?
- Subtract two bits
- Accept a carry-in from a previous stage (Correct answer)
- Produce a carry-out
- Handle negative numbers
Correct answer: Accept a carry-in from a previous stage
A full adder has three inputs (A, B, Carry-in), allowing it to be cascaded for multi-bit addition unlike a half adder.
ISCET Digital Electronics Principles 3
In two's complement representation using 8 bits, what is the decimal value of 11110000₂?