CS Computer Organization & Architecture 2

Question 1

What does CPU pipelining achieve in processor design?

Accepted Answer

Overlaps the execution stages of multiple instructions to increase throughput

Answer

Increases the clock frequency by reducing pipeline depth

Answer

Executes multiple instructions in a single clock cycle

Answer

Reduces the number of registers needed by the CPU

Question 2

Which type of pipeline hazard occurs when an instruction depends on the result of a previous instruction that has not yet completed?

Accepted Answer

Data hazard

Answer

Control hazard

Answer

Structural hazard

Answer

Memory hazard

Question 3

What is the primary purpose of CPU cache memory?

Accepted Answer

To reduce average memory access latency by storing frequently used data close to the CPU

Answer

To increase the total amount of addressable RAM

Answer

To store the CPU's microcode and firmware

Answer

To buffer I/O device data before it reaches main memory

Question 4

In a multiprocessor system, what does cache coherence ensure?

Accepted Answer

All processors observe a consistent view of shared memory values

Answer

Each processor's cache never becomes full

Answer

Cache lines are always evicted in LRU order

Answer

Write operations are always immediately flushed to disk

Question 5

What is a hardware interrupt?

Accepted Answer

An asynchronous signal from a device telling the CPU to stop and handle an event

Answer

A software exception caused by a division-by-zero error

Answer

A scheduled pause inserted by the compiler for synchronization

Answer

A CPU stall caused by a cache miss

Question 6

What distinguishes a RISC architecture from a CISC architecture?

Accepted Answer

RISC uses a small set of simple instructions that each complete in one clock cycle

Answer

RISC supports more complex addressing modes than CISC

Answer

CISC processors have more general-purpose registers than RISC

Answer

RISC instructions are variable-length to improve code density

Question 7

What does CPU clock speed (measured in GHz) represent?

Accepted Answer

The number of clock cycles the CPU can execute per second

Answer

The speed at which data travels across the memory bus

Answer

The rate at which the CPU reads from cache

Answer

The maximum number of instructions per second the CPU can retire