Design for Reliability Flashcards
7 cards from real CRE practice questions. Tap to flip, then mark Knew It or Still Learning — missed cards come back until you master them.
Read the first 7 Design for Reliability flashcards as text
In a Fault Tree Analysis (FTA), which gate represents an output event occurring only if ALL input events occur simultaneously?
Answer: AND gate
An AND gate in FTA produces the output event only when all of its input events occur, representing a situation where multiple failures must coincide to cause the top-level failure.
Common Cause Failures (CCF) are particularly dangerous in redundant systems because they:
Answer: Can simultaneously defeat multiple redundant elements from a single shared cause
CCFs can simultaneously disable multiple redundant components due to a shared vulnerability (e.g., same environmental exposure, design flaw, or maintenance error), negating the benefit of redundancy.
Highly Accelerated Life Testing (HALT) is primarily used during the design phase to:
Answer: Quickly find design weaknesses and operational/destruct limits by stressing beyond normal operating conditions
HALT applies stresses (thermal cycling, vibration, etc.) well beyond normal operating limits to rapidly precipitate and expose latent design weaknesses before production.
Tolerance design (Taguchi method) in Design for Reliability focuses on making a design:
Answer: Robust and insensitive to variations in materials, manufacturing, and environment
Taguchi's robust design methodology aims to make product performance insensitive (robust) to noise factors such as manufacturing variation, component aging, and environmental conditions.
Which reliability prediction standard is most commonly used for electronic components in US defense and aerospace applications?
Answer: MIL-HDBK-217
MIL-HDBK-217 is the most widely referenced US military handbook for electronic reliability prediction, providing failure rate models for a wide range of component types.
What is the primary objective of sneak circuit analysis (SCA) in system design?
Answer: To detect unintended electrical paths or conditions that can cause unwanted functions without component failure
Sneak circuit analysis identifies unexpected current paths, timing issues, or logic states in a design that can lead to unintended behavior without any component actually failing.
During Design for Reliability, 'design margins' are established to:
Answer: Provide a buffer between the design's rated capability and the anticipated worst-case operating stress
Design margins ensure that even under worst-case combinations of stress, tolerance variation, and environmental conditions, the design performs within safe operating limits.