CID Electromagnetic Compatibility & EMI Control 3

Question 1

What is the purpose of an ESD (Electrostatic Discharge) protection device placed at a PCB connector interface?

Accepted Answer

To clamp transient voltage spikes to safe levels before they damage internal ICs

Answer

To increase the signal rise time at the interface

Answer

To match the impedance of the connector to the PCB trace

Answer

To provide DC isolation between two circuit sections

Question 2

In the context of EMC pre-compliance testing, what is the advantage of using a near-field probe rather than waiting for a full OATS or semi-anechoic chamber test?

Accepted Answer

Near-field probes allow rapid identification and localization of noise sources on the PCB during development

Answer

Near-field probes provide calibrated absolute emissions levels referenced to CISPR limits

Answer

Near-field testing is accepted as a final compliance certification method by the FCC

Answer

Near-field probes measure only conducted emissions on power lines

Question 3

A PCB designer notices that a clock signal's return current is being forced around a plane slot. The most appropriate corrective action is:

Accepted Answer

Reroute the signal over a continuous reference plane or add a ground stitching bridge across the slot

Answer

Increase the clock frequency to reduce the loop inductance

Answer

Add a series termination resistor on the clock line

Answer

Move the clock driver IC to the opposite side of the board

Question 4

Which statement about differential signaling (e.g., LVDS) and EMI is most accurate?

Accepted Answer

Tightly coupled differential pairs cancel most magnetic fields when the coupling is ideal, reducing radiated emissions

Answer

Differential signals always increase EMI because they carry twice the current

Answer

Differential pairs must always be routed on outer layers to minimize EMI

Answer

Differential signals are only effective for EMI reduction below 100 MHz

Question 5

For a board operating above 1 GHz, which via structure modification best reduces the parasitic inductance and capacitance that cause signal integrity and EMI issues?

Accepted Answer

Using a back-drilled (counter-bored) via to remove unused via stub

Answer

Increasing via drill diameter to the maximum allowed by the fab

Answer

Adding a thermal relief connection to each via pad

Answer

Increasing the anti-pad (clearance hole) diameter in the reference plane

Question 6

What is the role of spread-spectrum clocking (SSC) in EMC compliance?

Accepted Answer

It modulates the clock frequency slightly to spread its spectral energy, reducing peak emissions at any single frequency

Answer

It increases the peak amplitude of the fundamental clock frequency to improve signal quality

Answer

It filters clock harmonics using a passive LC network built into the oscillator

Answer

It synchronizes multiple clocks on the board to eliminate inter-clock EMI

Question 7

According to IPC-2141A guidelines, what stackup characteristic most directly controls the controlled-impedance of a microstrip trace and also affects its EMI coupling to adjacent signals?

Accepted Answer

The height of the dielectric between the trace and its reference plane

Answer

The thickness of the solder mask layer above the trace

Answer

The copper weight of the inner signal layers

Answer

The total board thickness from top to bottom copper layer