CID CID Power Distribution & Grounding 2 — Questions and Answers
Question 1: What is the self-resonant frequency (SRF) of a decoupling capacitor, and why is it important?
- The frequency at which capacitance is maximized; used to select the largest capacitor
- The frequency at which capacitive and inductive reactances cancel, making the component appear purely resistive; effective decoupling only occurs below SRF (Correct answer)
- The frequency at which the capacitor fails permanently
- The frequency at which ESR is minimized
Correct answer: The frequency at which capacitive and inductive reactances cancel, making the component appear purely resistive; effective decoupling only occurs below SRF
At the SRF, a capacitor's parasitic inductance resonates with its capacitance, and above this frequency it behaves inductively, losing its decoupling effectiveness.
Question 2: What does ESR stand for in the context of decoupling capacitors, and what is its effect?
- Equivalent Series Resistance; it limits the minimum impedance a capacitor can achieve at resonance (Correct answer)
- Effective Signal Return; it determines return path routing
- Electrostatic Shield Ratio; it measures shielding effectiveness
- External Series Reactance; it adds inductive impedance
Correct answer: Equivalent Series Resistance; it limits the minimum impedance a capacitor can achieve at resonance
ESR (Equivalent Series Resistance) is the real resistive component of a capacitor's impedance and determines the minimum impedance it can achieve at its self-resonant frequency.
Question 3: Why is it recommended to use multiple capacitor values in parallel for PDN decoupling?
- To increase total capacitance only
- To cover a wider frequency range by targeting different resonance frequencies with different values (Correct answer)
- To reduce board cost through bulk purchasing
- To improve thermal dissipation
Correct answer: To cover a wider frequency range by targeting different resonance frequencies with different values
Different capacitor values have different SRFs, so using multiple values in parallel provides effective decoupling across a broader frequency spectrum.
Question 4: What is the role of bulk capacitors (e.g., 10µF–100µF) in a PDN design?
- Filtering high-frequency switching noise above 100 MHz
- Providing charge storage for low-frequency load transients and supporting the voltage regulator (Correct answer)
- Acting as the primary decoupling for digital ICs
- Terminating transmission lines
Correct answer: Providing charge storage for low-frequency load transients and supporting the voltage regulator
Bulk capacitors handle low-frequency energy storage, supplying charge during slow load transients while the voltage regulator responds.
Question 5: In PDN design, what is 'impedance flattening' and how is it achieved?
- Making all trace widths equal across the board
- Maintaining a flat, low PDN impedance profile across the target frequency range by combining capacitor tiers (Correct answer)
- Equalizing the resistance of all power planes
- Reducing the number of power domains
Correct answer: Maintaining a flat, low PDN impedance profile across the target frequency range by combining capacitor tiers
Impedance flattening means keeping PDN impedance below the target across all frequencies by strategically combining bulk, mid-range, and high-frequency decoupling capacitors.
Question 6: Which via type is preferred for decoupling capacitors in high-density HDI boards to minimize parasitic inductance?
- Through-hole vias
- Blind or buried vias with minimal length (Correct answer)
- Slotted vias
- Thermal relief vias
Correct answer: Blind or buried vias with minimal length
Blind or buried vias minimize via stub length and parasitic inductance, making them preferred for high-frequency decoupling in HDI designs.
CID CID Power Distribution & Grounding 2
What is the self-resonant frequency (SRF) of a decoupling capacitor, and why is it important?