BSCS Computer Architecture and Organization 2

Question 1

What is the function of the memory address register (MAR)?

Accepted Answer

Holds the address of memory to be read or written

Answer

Stores data read from memory

Answer

Counts memory accesses

Answer

Manages virtual memory mapping

Question 2

Which bus carries data between the CPU, memory, and I/O devices?

Accepted Answer

Data bus

Answer

Address bus

Answer

Control bus

Answer

System bus

Question 3

What is RISC in computer architecture?

Accepted Answer

Reduced Instruction Set Computer

Answer

Rapid Integrated System Computing

Answer

Remote Instruction Set Control

Answer

Refined Integrated Scalar Computer

Question 4

Which technique allows a CPU to begin executing instructions before a branch condition is resolved?

Accepted Answer

Speculative execution

Answer

Out-of-order execution

Answer

Branch prediction

Answer

Superscalar execution

Question 5

What does DMA stand for and what does it do?

Accepted Answer

Direct Memory Access — transfers data without CPU involvement

Answer

Dynamic Memory Allocation — allocates RAM dynamically

Answer

Data Management Architecture — organizes storage

Answer

Distributed Memory Array — connects RAM modules

Question 6

What is the von Neumann bottleneck?

Accepted Answer

The shared bus between CPU and memory limits throughput

Answer

The CPU cannot perform floating-point operations fast enough

Answer

Cache misses slow down instruction execution

Answer

Multiple cores compete for the same ALU