BEE Digital Logic and Microprocessors 4 — Questions and Answers
Question 1: Which logic family offers the lowest power consumption, making it ideal for battery-powered devices?
- TTL
- ECL
- CMOS (Correct answer)
- DTL
Correct answer: CMOS
CMOS logic consumes negligible static power because it draws current only during switching transitions.
Question 2: A 3-to-8 line decoder with active-low outputs has all inputs = 1. Which output line is asserted?
- Output 0 (Y0)
- Output 7 (Y7) (Correct answer)
- All outputs
- No output
Correct answer: Output 7 (Y7)
Binary 111 = decimal 7, so Y7 is selected and pulled LOW (active-low) while all others remain HIGH.
Question 3: In pipelining, what is a 'pipeline hazard'?
- Overheating of pipeline stages
- A condition that prevents the next instruction from executing in the next cycle (Correct answer)
- Data corruption in pipeline registers
- A timing violation in the clock network
Correct answer: A condition that prevents the next instruction from executing in the next cycle
Pipeline hazards are conditions (structural, data, or control) that prevent continuous instruction flow through the pipeline.
Question 4: What is the output of a 4-bit binary counter after 18 clock pulses, starting from 0000?
- 0010 (Correct answer)
- 0011
- 0100
- 1010
Correct answer: 0010
A 4-bit counter cycles through 0–15 (modulo 16); 18 mod 16 = 2, which is 0010 in binary.
Question 5: Which type of ROM can be erased by exposing it to ultraviolet light?
- PROM
- EPROM (Correct answer)
- EEPROM
- Flash
Correct answer: EPROM
EPROM (Erasable Programmable ROM) is erased by exposing it to UV light through a quartz window.
Question 6: In IEEE 754 single-precision floating point, how many bits are allocated to the exponent field?
- 7
- 8 (Correct answer)
- 10
- 23
Correct answer: 8
IEEE 754 single-precision format uses 1 sign bit, 8 exponent bits, and 23 mantissa bits.
Question 7: What is the primary advantage of a Harvard architecture over a Von Neumann architecture?
- Simpler hardware design
- Simultaneous instruction and data memory access (Correct answer)
- Larger addressable memory space
- Lower power consumption
Correct answer: Simultaneous instruction and data memory access
Harvard architecture uses separate buses for instruction and data memory, allowing simultaneous access and higher throughput.
BEE Digital Logic and Microprocessors 4
Which logic family offers the lowest power consumption, making it ideal for battery-powered devices?