Digital Circuits Flashcards
7 cards from real BEE practice questions. Tap to flip, then mark Knew It or Still Learning — missed cards come back until you master them.
Read the first 7 Digital Circuits flashcards as text
A JK flip-flop with J=1 and K=1 is in the SET state. After one clock pulse, what is the output?
Answer: Toggles to RESET
When J=K=1, the JK flip-flop toggles its output on each clock pulse, so it moves from SET (Q=1) to RESET (Q=0).
Which hazard occurs in combinational circuits when a variable and its complement arrive at a gate at different times?
Answer: Static hazard
A static hazard is a momentary unwanted output transition caused by unequal propagation delays of a signal and its complement.
What is the minimum number of NAND gates required to implement a 2-input XOR function?
Answer: 4
A 2-input XOR gate can be built using 4 two-input NAND gates with the standard NAND-only XOR topology.
In a ripple counter with 4 flip-flops, what is the maximum count before the counter resets to zero?
Answer: 15
A 4-bit ripple counter counts from 0 to 2⁴−1 = 15 before rolling over to 0.
Which logic family has the highest noise margin compared to its supply voltage?
Answer: CMOS
CMOS has noise margins of approximately 30–45% of VDD on each rail, giving it superior noise immunity relative to supply voltage.
A full adder has inputs A=1, B=1, Cin=1. What are the Sum and Cout outputs?
Answer: Sum=1, Cout=1
1+1+1 = 3 in decimal = 11 in binary, so Sum=1 and Cout=1.
Which statement best describes a tri-state buffer?
Answer: It can drive a bus to 0, 1, or disconnect (high-Z)
A tri-state buffer can output logic 0, logic 1, or present a high-impedance (high-Z) state, allowing multiple drivers to share a bus.