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Analog and Digital Electronics Flashcards

7 cards from real BEE practice questions. Tap to flip, then mark Knew It or Still Learning — missed cards come back until you master them.

Read the first 7 Analog and Digital Electronics flashcards as text
  1. In an R-2R ladder DAC, the primary advantage over a binary-weighted DAC is:

    Answer: Only two resistor values are needed regardless of bit count

    The R-2R ladder uses only two resistor values (R and 2R) for any number of bits, making precision matching much easier to manufacture.

  2. Which configuration of an op-amp provides the highest input impedance?

    Answer: Voltage follower (unity gain buffer)

    A voltage follower connects the output directly to the inverting input with the signal at the non-inverting input, yielding input impedance approaching infinity due to near-zero differential input voltage.

  3. In a JK flip-flop, setting J=1 and K=1 causes the output to:

    Answer: Toggle to the complement of Q

    The J=K=1 condition is the toggle mode of the JK flip-flop, where Q changes to its complement on each active clock edge.

  4. A Wien bridge oscillator uses which type of feedback network to set oscillation frequency?

    Answer: RC lead-lag network

    The Wien bridge uses an RC lead-lag network that provides 0° phase shift at the resonant frequency f = 1/(2πRC), setting the oscillation frequency.

  5. In digital logic, the fan-out of a gate refers to:

    Answer: The maximum number of identical gate inputs a gate output can reliably drive

    Fan-out specifies how many standard gate inputs can be connected to a single gate output while maintaining valid logic levels.

  6. The Early effect in a BJT manifests as:

    Answer: Non-zero output conductance causing IC to increase slightly with VCE

    The Early effect (base-width modulation) causes the effective base width to shrink with increasing VCE, slightly increasing collector current and creating finite output resistance.

  7. A 4-to-16 decoder can be constructed from:

    Answer: Two 3-to-8 decoders with an enable input

    Two 3-to-8 decoders with enable lines can be combined — one upper address bit selects which 3-to-8 decoder is active, giving 16 total outputs.