Digital Logic and Systems Flashcards

Which of the following statements accurately describes a key difference between a ripple counter (asynchronous) and a synchronous counter?

Answer: In a ripple counter, the clock input of subsequent flip-flops is triggered by the output of the preceding flip-flop, while in a synchronous counter, all flip-flops are triggered by a common clock signal.

The primary distinction lies in the clocking mechanism. In an asynchronous or ripple counter, only the first flip-flop is connected to the external clock. Subsequent flip-flops are clocked by the output of the previous one, causing a 'ripple' effect. In a synchronous counter, all flip-flops share a common clock signal and change state simultaneously, eliminating the cumulative propagation delay found in ripple counters.

A digital systems engineer needs to represent the decimal value -25 in an 8-bit signed binary format. Using the two's complement method, what is the correct binary representation?

Answer: 11100111

To find the two's complement of -25: First, represent +25 in 8-bit binary: 00011001. Second, invert all the bits (one's complement): 11100110. Third, add 1 to the result: 11100110 + 1 = 11100111. This is the 8-bit two's complement representation of -25.

In a digital logic circuit, what is the primary functional difference between a combinational circuit and a sequential circuit?

Answer: A combinational circuit's output depends solely on its current inputs, while a sequential circuit's output depends on both current inputs and its previous state.

A combinational circuit's output is a pure function of its present input values only, with no memory of past inputs. In contrast, a sequential circuit contains memory elements (like flip-flops or latches), and its output depends not only on the current inputs but also on the stored information from previous states.

Applying De Morgan's theorem to the Boolean expression (A + B)' ⋅ C simplifies to which of the following expressions?

Answer: A' ⋅ B' ⋅ C

De Morgan's first theorem states that the complement of a sum is equal to the product of the complements, i.e., (X + Y)' = X' ⋅ Y'. Applying this to the (A + B)' part of the expression gives A' ⋅ B'. The original expression then becomes A' ⋅ B' ⋅ C.

A design requires a logic circuit that can store one bit of data and is triggered by a clock signal. However, a known issue with simple JK flip-flops, the 'race-around condition,' must be avoided. Which of the following digital logic components is specifically designed to solve this problem?

Answer: Master-Slave JK Flip-Flop

The Master-Slave JK Flip-Flop was developed to eliminate the race-around condition that can occur in a standard JK flip-flop when both J and K inputs are high. It consists of two flip-flops, a 'master' and a 'slave', which are clocked on opposite edges or levels of the clock signal. This ensures that the output only changes once per clock cycle, providing stable and predictable toggling.

When using a Karnaugh map (K-map) to simplify a Boolean expression, which of the following is a fundamental rule for grouping the 1s (for a Sum-of-Products form)?

Answer: Each group must contain a number of cells that is a power of 2 (e.g., 1, 2, 4, 8).

A key rule in K-map simplification is that cells containing 1s (or 0s for POS) must be grouped in rectangles or squares containing a total number of cells that is a power of two (1, 2, 4, 8, 16, etc.). This allows for the elimination of variables based on Boolean algebra principles. Diagonal grouping is not allowed, groups can overlap, and the goal is to make groups as large as possible to achieve maximum simplification.