ALU 101 Adder Circuits and Addition Logic 2

Question 1

What key technique does a carry lookahead adder (CLA) use to improve speed?

Accepted Answer

Computes all carry bits in parallel using generate and propagate signals

Answer

Reduces the total number of full adders needed

Answer

Eliminates carry bits entirely from the addition process

Answer

Converts operands to BCD before adding

Question 2

In carry lookahead logic, what does the 'generate' signal (G = A·B) indicate?

Accepted Answer

The stage will always produce a carry-out regardless of the carry-in

Answer

The stage will pass the carry-in to the carry-out

Answer

The stage produces no carry under any condition

Answer

The stage generates an inverted sum bit

Question 3

In carry lookahead logic, what does the 'propagate' signal (P = A XOR B) indicate?

Accepted Answer

The stage will pass an incoming carry-in to its carry-out

Answer

The stage always creates a carry regardless of carry-in

Answer

The stage blocks any carry from passing through

Answer

The stage resets the carry register to zero

Question 4

For a 1-bit stage with inputs A=1 and B=1, what are the values of the generate (G) and propagate (P) signals?

Accepted Answer

G=1, P=0

Answer

G=0, P=0

Answer

G=0, P=1

Answer

G=1, P=1

Question 5

What is the correct carry-in value for the least significant bit (LSB) stage in a standard unsigned multi-bit addition?

Accepted Answer

0

Answer

1

Answer

The MSB of operand A

Answer

Undefined until computed

Question 6

Which adder architecture achieves the fastest carry computation for wide word sizes?

Accepted Answer

Carry lookahead adder

Answer

Ripple carry adder

Answer

Serial adder

Answer

Half-adder chain

Question 7

What is a carry-save adder (CSA) primarily designed to do?

Accepted Answer

Reduce three or more inputs to two outputs (sum and carry vectors) without propagating carries

Answer

Add exactly two operands with no carry propagation

Answer

Perform binary subtraction using complement arithmetic

Answer

Execute floating-point addition with guard bits