ALU 101 Adder Circuits and Addition Logic 2 — Questions and Answers
Question 1: What key technique does a carry lookahead adder (CLA) use to improve speed?
- Reduces the total number of full adders needed
- Computes all carry bits in parallel using generate and propagate signals (Correct answer)
- Eliminates carry bits entirely from the addition process
- Converts operands to BCD before adding
Correct answer: Computes all carry bits in parallel using generate and propagate signals
A carry lookahead adder precomputes all carry bits simultaneously using generate (G) and propagate (P) signals, eliminating the ripple delay.
Question 2: In carry lookahead logic, what does the 'generate' signal (G = A·B) indicate?
- The stage will always produce a carry-out regardless of the carry-in (Correct answer)
- The stage will pass the carry-in to the carry-out
- The stage produces no carry under any condition
- The stage generates an inverted sum bit
Correct answer: The stage will always produce a carry-out regardless of the carry-in
G = A·B means both inputs are 1, so a carry is generated at that stage no matter what value the carry-in holds.
Question 3: In carry lookahead logic, what does the 'propagate' signal (P = A XOR B) indicate?
- The stage always creates a carry regardless of carry-in
- The stage will pass an incoming carry-in to its carry-out (Correct answer)
- The stage blocks any carry from passing through
- The stage resets the carry register to zero
Correct answer: The stage will pass an incoming carry-in to its carry-out
P = A⊕B means exactly one input is 1, so if carry-in is 1, the stage will forward it as carry-out.
Question 4: For a 1-bit stage with inputs A=1 and B=1, what are the values of the generate (G) and propagate (P) signals?
- G=0, P=0
- G=1, P=0 (Correct answer)
- G=0, P=1
- G=1, P=1
Correct answer: G=1, P=0
When A=1 and B=1, G = A·B = 1 and P = A⊕B = 0, so the stage generates a carry but does not propagate one.
Question 5: What is the correct carry-in value for the least significant bit (LSB) stage in a standard unsigned multi-bit addition?
- 1
- The MSB of operand A
- 0 (Correct answer)
- Undefined until computed
Correct answer: 0
There is no carry coming into the LSB position from a lower stage, so the carry-in is defined as 0 for unsigned addition.
Question 6: Which adder architecture achieves the fastest carry computation for wide word sizes?
- Ripple carry adder
- Serial adder
- Carry lookahead adder (Correct answer)
- Half-adder chain
Correct answer: Carry lookahead adder
Carry lookahead adders compute all carries in parallel in O(log n) depth, making them significantly faster than ripple carry adders for wide operands.
Question 7: What is a carry-save adder (CSA) primarily designed to do?
- Add exactly two operands with no carry propagation
- Reduce three or more inputs to two outputs (sum and carry vectors) without propagating carries (Correct answer)
- Perform binary subtraction using complement arithmetic
- Execute floating-point addition with guard bits
Correct answer: Reduce three or more inputs to two outputs (sum and carry vectors) without propagating carries
A carry-save adder accepts three inputs and produces sum and carry vectors without propagating the carry, making it ideal for multi-operand reduction in multipliers.
ALU 101 Adder Circuits and Addition Logic 2
What key technique does a carry lookahead adder (CLA) use to improve speed?