Arithmetic Logic Unit 101 (ALU 101) Exam — Questions and Answers

Question 1: What distinguishes a parallel prefix adder (such as Kogge-Stone) from a standard carry lookahead adder?

It uses a tree structure to compute prefix generate/propagate in O(log n) depth (Correct answer)
It eliminates the need for propagate signals entirely
It uses a simpler, smaller circuit with fewer gates
It achieves lower power consumption at the cost of speed

Correct answer: It uses a tree structure to compute prefix generate/propagate in O(log n) depth

Parallel prefix adders arrange generate and propagate computations in a binary tree, achieving O(log n) carry depth and faster operation than flat CLA structures.

Question 2: What happens in most hardware ALUs when integer overflow is not handled explicitly?

The CPU halts immediately
The overflow is automatically corrected
The result wraps around modulo 2^n, potentially producing an incorrect silent error (Correct answer)
The instruction is retried

Correct answer: The result wraps around modulo 2^n, potentially producing an incorrect silent error

Without overflow trapping, the ALU simply truncates the result to n bits, wrapping around, and the overflow flag is set but often ignored by software.

Question 3: Which number system uses the digits 0–7?

Hexadecimal
Decimal
Binary
Octal (Correct answer)

Correct answer: Octal

The octal number system (base 8) uses the digits 0 through 7.

Question 4: How many inputs does a full adder have?

3 (Correct answer)
2
4
5

Correct answer: 3

A full adder has three inputs: two operand bits (A and B) and a carry-in (Cin) from a previous stage.

Question 5: For a 1-bit stage with inputs A=1 and B=1, what are the values of the generate (G) and propagate (P) signals?

G=0, P=1
G=1, P=1
G=1, P=0 (Correct answer)
G=0, P=0

Correct answer: G=1, P=0

When A=1 and B=1, G = A·B = 1 and P = A⊕B = 0, so the stage generates a carry but does not propagate one.

Question 6: Adding two positive signed numbers yields a negative result. This is an example of:

Arithmetic underflow
Carry propagation
Signed overflow (Correct answer)
Unsigned overflow

Correct answer: Signed overflow

When adding two positive numbers produces a negative result in signed arithmetic, it is a signed overflow because the result exceeded the positive range.

Question 7: What causes a divide-by-zero exception in an ALU?

The dividend is larger than the divisor
The result exceeds 32 bits
The dividend is negative
The divisor operand equals zero, making the quotient mathematically undefined (Correct answer)

Correct answer: The divisor operand equals zero, making the quotient mathematically undefined

Division by zero is undefined mathematically; the ALU detects a zero divisor and raises an exception rather than producing an infinite or garbage result.

Question 8: Why is the carry lookahead adder faster than the ripple carry adder?

It skips zero-bit columns
It computes all carry bits in parallel rather than sequentially (Correct answer)
It uses fewer transistors
It uses clocked flip-flops for carry storage

Correct answer: It computes all carry bits in parallel rather than sequentially

The carry lookahead adder generates all carry bits simultaneously using propagate and generate logic, eliminating sequential carry ripple delay.

Question 9: What is the role of a Wallace tree in fast multiplier circuits within an ALU?

To implement division
To reduce multiple partial products into two rows using carry-save adders for fast summation (Correct answer)
To shift bits efficiently
To detect overflow

Correct answer: To reduce multiple partial products into two rows using carry-save adders for fast summation

A Wallace tree uses a network of carry-save adders to reduce n partial products into a sum and carry row, which a final adder then combines quickly.

Question 10: In an 8-bit signed two's complement system, what is the range of representable integers?

-128 to 127 (Correct answer)
-255 to 255
-127 to 127
0 to 255

Correct answer: -128 to 127

An 8-bit two's complement number can represent values from −128 (10000000) to +127 (01111111).

Question 11: In a BCD adder, what correction is applied to a digit sum that exceeds 9?

Subtract 6 (0110) from the result
Add 10 (1010) to the result
Reset all bits to zero and set carry
Add 6 (0110) to the result (Correct answer)

Correct answer: Add 6 (0110) to the result

When a BCD digit sum exceeds 9 or produces a carry, 6 is added to bridge the gap between binary and decimal digit encoding.

Question 12: Which representation is used internally by modern ALUs for signed integer arithmetic?

Excess-N
One's complement
Sign-magnitude
Two's complement (Correct answer)

Correct answer: Two's complement

Two's complement is universal in modern ALUs because addition, subtraction, and negation all work with the same hardware without special cases.

Question 13: What does the term 'word size' define in the context of an ALU?

The clock frequency of the ALU
The number of bits the ALU processes in a single operation (Correct answer)
The number of instructions the ALU supports
The number of registers in the CPU

Correct answer: The number of bits the ALU processes in a single operation

Word size is the number of bits an ALU handles as a single unit, determining the maximum integer precision per operation.

Question 14: How does the ALU detect and flag an underflow condition in floating-point arithmetic?

When the exponent exceeds its maximum value
When the mantissa overflows
When the result is too small to be represented as a normalized number (Correct answer)
When two negative numbers are added

Correct answer: When the result is too small to be represented as a normalized number

Underflow occurs when the magnitude of the result is smaller than the smallest normalized floating-point number, causing precision loss or a flush to zero.

Question 15: In two's complement representation, what is the value of the 8-bit pattern 11110000?

-16 (Correct answer)
-14
240
-15

Correct answer: -16

Inverting 11110000 gives 00001111 = 15, then adding 1 gives 16, so the value is -16.

Question 16: In a ripple carry adder, why does carry propagation slow down the circuit?

Carry signals require extra power
The carry flip-flop needs clock synchronization
Carry bits travel over long wire distances
Each bit's carry must wait for the previous bit's carry to settle (Correct answer)

Correct answer: Each bit's carry must wait for the previous bit's carry to settle

In a ripple carry adder, each stage must wait for the carry from the previous stage, so delay accumulates through all stages.

Question 17: Which representation is used to simplify subtraction in ALU hardware?

BCD
One's complement
Sign-magnitude
Two's complement (Correct answer)

Correct answer: Two's complement

Two's complement is used in ALU hardware because subtraction can be performed as addition of a negative number without special circuitry.

Question 18: In x86 assembly, which instruction is used after an integer multiply to check for overflow?

JO (Jump if Overflow) (Correct answer)
JC (Jump if Carry)
JNS (Jump if Not Sign)
JZ (Jump if Zero)

Correct answer: JO (Jump if Overflow)

After IMUL, the CPU sets OF if the result doesn't fit in the destination; JO branches to an overflow handler if that flag is set.

Question 19: In Gray code, how many bits change between consecutive values?

All bits
Two bits
No bits
One bit (Correct answer)

Correct answer: One bit

Gray code is designed so that consecutive values differ by exactly one bit, reducing errors in digital communications.

Question 20: What are the two outputs produced by a half adder?

Product and Carry
Sum and Borrow
Quotient and Remainder
Sum and Carry (Correct answer)

Correct answer: Sum and Carry

A half adder produces a Sum output (XOR of the two input bits) and a Carry output (AND of the two input bits).

Question 21: In carry lookahead logic, what does the 'propagate' signal (P = A XOR B) indicate?

The stage resets the carry register to zero
The stage blocks any carry from passing through
The stage will pass an incoming carry-in to its carry-out (Correct answer)
The stage always creates a carry regardless of carry-in

Correct answer: The stage will pass an incoming carry-in to its carry-out

P = A⊕B means exactly one input is 1, so if carry-in is 1, the stage will forward it as carry-out.

Question 22: What Boolean function does the ALU perform to check for equality between two binary numbers?

AND
OR
XNOR (Correct answer)
XOR

Correct answer: XNOR

The XNOR (Exclusive NOR) gate outputs a 1 if its inputs are the same (both 0 or both 1) and a 0 if they are different. Therefore, an XNOR operation is precisely what an ALU uses to check for equality between two binary numbers bit by bit. If all corresponding bits are equal, the overall result indicates equality.

Question 23: How is the decimal number 25 represented in 8-bit binary?

00011100
00010011
00011001 (Correct answer)
00110001

Correct answer: 00011001

25 = 16 + 8 + 1 = 2^4 + 2^3 + 2^0, giving the 8-bit pattern 00011001.

Question 24: In a combined adder/subtractor circuit, what controls whether addition or subtraction is performed?

A mode select signal (M) that inverts B bits and sets carry-in (Correct answer)
The overflow flag from the status register
The zero flag output of the ALU
The carry-in value from the previous stage

Correct answer: A mode select signal (M) that inverts B bits and sets carry-in

A mode select signal M is XORed with each bit of B; when M=1, B is bitwise inverted and M is also fed as carry-in, effecting two's complement subtraction.

Question 25: What hardware mechanism detects signed overflow in an ALU adder?

Parity check on the result
Comparing operand signs with the result sign
XOR of the MSB carry-in and carry-out (Correct answer)
AND of all carry bits

Correct answer: XOR of the MSB carry-in and carry-out

Signed overflow is detected by XOR-ing the carry into the most significant bit with the carry out of the most significant bit.

Question 26: What does the NOP instruction do in an ALU-based processor?

Clears all flags
Negates the accumulator
Performs no operation and advances the program counter (Correct answer)
Resets the ALU

Correct answer: Performs no operation and advances the program counter

NOP (No Operation) causes the processor to do nothing and simply advance to the next instruction, used for timing, alignment, or placeholder purposes.

Question 27: In a pipelined ALU, what does 'pipeline latency' refer to?

The time to fabricate the ALU chip
The number of clock cycles before the first result emerges from the pipeline (Correct answer)
The power drawn during idle cycles
The size of the register file

Correct answer: The number of clock cycles before the first result emerges from the pipeline

Pipeline latency is the fill delay—how many cycles must pass before the first valid result exits the multi-stage pipeline.

Question 28: Which adder topology offers the best speed for very wide (e.g., 64-bit) ALU addition?

Serial adder
Ripple-carry adder
Carry-save adder
Kogge-Stone parallel prefix adder (Correct answer)

Correct answer: Kogge-Stone parallel prefix adder

The Kogge-Stone adder computes all carries in O(log n) stages using a parallel prefix tree, minimizing critical path delay for wide words.

Question 29: How many gates are required to build a full adder using basic logic gates?

3
2
5 (Correct answer)
9

Correct answer: 5

A full adder can be built using 5 basic logic gates: 2 XOR, 2 AND, and 1 OR gate.

Question 30: What is the maximum sum when adding two 4-bit unsigned numbers?

16
30 (Correct answer)
15
31

Correct answer: 30

The maximum 4-bit unsigned value is 15 (1111₂), so 15 + 15 = 30, which requires 5 bits to represent and sets the carry-out of the adder.

Question 31: A rotate-right-through-carry operation moves bits to the right and:

Moves the LSB into the carry flag and the carry flag into the MSB (Correct answer)
Discards the LSB
Fills vacated positions with zeros
Copies the MSB to all positions

Correct answer: Moves the LSB into the carry flag and the carry flag into the MSB

Rotate right through carry shifts bits right, placing the outgoing LSB into the carry flag and the previous carry flag value into the MSB.

Question 32: What is the decimal value of the 8-bit two's complement number 10000000?

-0
-127
-128 (Correct answer)
128

Correct answer: -128

In 8-bit two's complement, 10000000 represents -128, the most negative representable value.

Question 33: Which logic gate implements the Sum output of a half adder?

XOR gate (Correct answer)
AND gate
NAND gate
OR gate

Correct answer: XOR gate

The Sum output of a half adder is implemented with an XOR gate because it outputs 1 only when the two input bits differ.

Question 34: In two's complement addition, how can you detect signed overflow using the carry-in and carry-out of the MSB?

Overflow = carry-in XOR carry-out of the MSB (Correct answer)
Overflow = carry-in OR carry-out
Overflow = carry-in AND carry-out
Overflow = NOT carry-out

Correct answer: Overflow = carry-in XOR carry-out of the MSB

Signed overflow is detected when the carry into the sign bit differs from the carry out of the sign bit, an XOR of those two carry values.

Question 35: What ALU flag indicates that the result of a signed operation is negative?

Negative flag (N) (Correct answer)
Carry flag (C)
Overflow flag (V)
Zero flag (Z)

Correct answer: Negative flag (N)

The negative flag (N), also called the sign flag, is set to the value of the most significant bit of the result, indicating a negative signed value.

Question 36: What additional input does a full adder have compared to a half adder?

Carry-in (Correct answer)
Enable signal
Borrow bit
Overflow bit

Correct answer: Carry-in

A full adder accepts a Carry-in input in addition to the two data bits, allowing chaining of multiple adders.

Question 37: Which ALU operation would you use to multiply two numbers?

Bitwise XOR
Division
Repeated addition
Shift and add method (Correct answer)

Correct answer: Shift and add method

ALUs typically perform multiplication using a series of shift and add operations. This method involves repeatedly shifting the multiplicand and adding it to a running total based on the bits of the multiplier. This approach leverages the existing adder and shifter circuits within the ALU, making it an efficient way to implement multiplication.

Question 38: Simplify the Boolean expression 𝐴⋅(B+C)

A+B+C
A⋅B⋅C
A⋅B+A⋅C (Correct answer)
A⋅(B⋅C)

Correct answer: A⋅B+A⋅C

This is an application of the Distributive Law in Boolean algebra, which is analogous to its counterpart in ordinary algebra. The AND operation (⋅) distributes over the OR operation (+). Thus, A⋅(B+C) expands to (A⋅B) + (A⋅C).

Question 39: What is the sign-magnitude representation of -13 in 8 bits?

00001101
11110011
11110010
10001101 (Correct answer)

Correct answer: 10001101

In sign-magnitude, the MSB is the sign bit (1 for negative) and the remaining bits are the magnitude: 0001101 = 13, so -13 = 10001101.

Question 40: How does an ALU typically perform binary subtraction using adder hardware?

Reversing all bits of both operands before adding
Using a separate dedicated subtractor circuit
Adding the two's complement of the subtrahend to the minuend (Correct answer)
Applying a series of half adders in reverse order

Correct answer: Adding the two's complement of the subtrahend to the minuend

Subtraction A − B is computed as A + (~B) + 1, which adds the two's complement of B, allowing the same adder hardware to handle both operations.

Question 41: When two positive signed numbers are added and the result has its sign bit set to 1, what condition has occurred?

Carry error
Borrow error
Arithmetic underflow
Arithmetic overflow (Correct answer)

Correct answer: Arithmetic overflow

Arithmetic overflow occurs when the true sum of two positive numbers exceeds the maximum positive value representable, causing the sign bit to incorrectly read as negative.

Question 42: Which operation is typically used by an ALU to perform subtraction?

Bitwise OR
Two's complement addition (Correct answer)
Bitwise AND
Addition

Correct answer: Two's complement addition

ALUs perform subtraction by utilizing the two's complement method. Instead of directly subtracting, the ALU calculates the two's complement of the number to be subtracted and then adds it to the first number. This allows the same adder circuitry to handle both addition and subtraction, simplifying the ALU's design.

Question 43: Which flag is set when the result of an ALU operation is exactly zero?

Parity flag
Sign flag
Overflow flag
Zero flag (Correct answer)

Correct answer: Zero flag

The Zero flag (ZF) is set by the ALU when all bits of the result are 0, used by conditional branch instructions.

Question 44: Which instruction type uses an operand value embedded directly in the instruction encoding?

Relative instruction
Register instruction
Indirect instruction
Immediate instruction (Correct answer)

Correct answer: Immediate instruction

An immediate instruction embeds a constant operand value directly within the instruction's binary encoding, rather than referencing a register or memory.

Question 45: What is the difference between an arithmetic right shift and a logical right shift?

They are identical operations
Arithmetic fills with zeros; logical fills with the sign bit
Arithmetic shifts by 2; logical shifts by 1
Arithmetic fills with the sign bit; logical fills with zeros (Correct answer)

Correct answer: Arithmetic fills with the sign bit; logical fills with zeros

Arithmetic right shift replicates the sign bit into vacated positions (preserving sign), while logical right shift always fills with zeros.

Question 46: Which adder architecture eliminates ripple carry delay by pre-computing carries?

Booth Multiplier
Carry Lookahead Adder (Correct answer)
Wallace Tree Adder
Carry Save Adder

Correct answer: Carry Lookahead Adder

A Carry Lookahead Adder (CLA) pre-computes carry signals for all bit positions simultaneously, greatly reducing propagation delay.

Question 47: In 4-bit two's complement, what is the result of 0111 + 0001?

1001 with overflow
1000 with no overflow
1000 with overflow (Correct answer)
0111 with carry

Correct answer: 1000 with overflow

0111 + 0001 = 1000 in binary; in 4-bit two's complement, 1000 = −8, so adding 7+1 overflowed the positive range.

Question 48: How many bits are required to represent the decimal number 255?

9
8 (Correct answer)
7
6

Correct answer: 8

255 = 2⁸ − 1, so 8 bits are needed to represent it (11111111 in binary).

Question 49: What is the decimal equivalent of the binary number 1011?

9
10
13
11 (Correct answer)

Correct answer: 11

1011 in binary = 1×8 + 0×4 + 1×2 + 1×1 = 8 + 0 + 2 + 1 = 11 in decimal.

Question 50: What is the purpose of a DIV (divide) instruction in the ALU?

Performs floating-point division only
Doubles the value of the operand
Computes the quotient and remainder of integer division (Correct answer)
Shifts bits by a fixed amount

Correct answer: Computes the quotient and remainder of integer division

The DIV instruction performs integer division, producing both the quotient and the remainder (modulo) of the operation.

Question 51: An XOR gate outputs HIGH when its two inputs are:

Both 1
Different (Correct answer)
Same
Both 0

Correct answer: Different

An XOR (exclusive OR) gate outputs 1 only when its inputs differ from each other.

Question 52: In IEEE 754 floating-point, what value does the FPU produce for a division by zero operation?

Positive or negative infinity (Correct answer)
NaN (Not a Number)
The maximum representable float
Zero

Correct answer: Positive or negative infinity

IEEE 754 defines that a finite non-zero number divided by zero yields ±infinity, with the sign determined by the operand signs.

Question 53: Which number representation allows the ALU to perform subtraction using only adder hardware?

Sign-magnitude
One's complement
Two's complement (Correct answer)
Excess-127

Correct answer: Two's complement

Two's complement lets you subtract by adding the negated value, so no separate subtractor circuit is needed.

Question 54: What ALU control signal is used to implement a NOT operation on a single operand?

Feeding the operand to the inverter path and selecting it via the operation MUX (Correct answer)
Using the shift-right control line
Passing the operand through a subtractor with zero
Setting the carry-in to 1

Correct answer: Feeding the operand to the inverter path and selecting it via the operation MUX

The ALU routes the input through inverter logic and the operation MUX selects the inverted result when the NOT opcode is applied.

Question 55: In a 4-bit ALU IC such as the 74181, what does the 'M' control input determine?

The number of carry bits
The operand word size
The output voltage level
Whether the ALU performs arithmetic or logic operations (Correct answer)

Correct answer: Whether the ALU performs arithmetic or logic operations

The M pin on the 74181 selects between arithmetic mode (M=0) and logic mode (M=1), switching the ALU's operation family.

Question 56: What is the primary advantage of two's complement over one's complement for ALU design?

It requires fewer bits
It supports floating point natively
It has a unique representation of zero, simplifying arithmetic circuits (Correct answer)
It supports larger numbers

Correct answer: It has a unique representation of zero, simplifying arithmetic circuits

One's complement has two representations of zero (+0 and -0), while two's complement has only one, simplifying zero detection and arithmetic.

Question 57: What is the value of binary 1000 0000 in an 8-bit two's complement system?

0
128
-1
-128 (Correct answer)

Correct answer: -128

In 8-bit two's complement, 10000000 represents −128, the most negative representable value.

Question 58: What is the effect of the INTO instruction in x86 architecture?

It initializes all registers to zero
It converts integer to float
It generates an overflow exception trap (INT 4) if the Overflow flag is set (Correct answer)
It inserts a no-operation delay

Correct answer: It generates an overflow exception trap (INT 4) if the Overflow flag is set

INTO (Interrupt if Overflow) raises interrupt vector 4 if OF=1, allowing legacy programs to trap arithmetic overflow without an explicit JO.

Question 59: What is the correct carry-in value for the least significant bit (LSB) stage in a standard unsigned multi-bit addition?

1
The MSB of operand A
0 (Correct answer)
Undefined until computed

Correct answer: 0

There is no carry coming into the LSB position from a lower stage, so the carry-in is defined as 0 for unsigned addition.

Question 60: What is the correct Boolean expression for the carry-out of a full adder?

(A AND B) OR (Cin AND (A XOR B)) (Correct answer)
A XOR B XOR Cin
A AND B AND Cin
A OR B OR Cin

Correct answer: (A AND B) OR (Cin AND (A XOR B))

The carry-out expression (A·B) + (Cin·(A⊕B)) covers carry generation when both A and B are 1, and carry propagation when Cin passes through.

Arithmetic Logic Unit 101 (ALU 101) Exam

The ALU 101 exam assesses foundational knowledge of arithmetic logic unit design and computer arithmetic, covering binary number systems, data representation, adder circuits, carry and overflow logic, and ALU design and architecture principles.

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75 min

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70%

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