ALU 101 ALU Design and Architecture 1 — Questions and Answers
Question 1: What distinguishes a combinational ALU from a sequential ALU?
- A combinational ALU uses clock signals; sequential does not
- A combinational ALU produces outputs purely from current inputs with no internal state (Correct answer)
- A sequential ALU is faster
- A combinational ALU can only perform logic operations
Correct answer: A combinational ALU produces outputs purely from current inputs with no internal state
A combinational ALU is entirely built from combinational logic — outputs are a direct function of current inputs with no flip-flops storing state.
Question 2: In a multi-function ALU, what determines how many operation select lines are required?
- The operand bit width
- The number of distinct operations, since n select lines support up to 2^n operations (Correct answer)
- The clock frequency
- The number of input ports
Correct answer: The number of distinct operations, since n select lines support up to 2^n operations
With n select lines you can encode 2^n operation codes, so the number of operations supported dictates the minimum required select lines.
Question 3: What is the role of a Wallace tree in fast multiplier circuits within an ALU?
- To shift bits efficiently
- To reduce multiple partial products into two rows using carry-save adders for fast summation (Correct answer)
- To detect overflow
- To implement division
Correct answer: To reduce multiple partial products into two rows using carry-save adders for fast summation
A Wallace tree uses a network of carry-save adders to reduce n partial products into a sum and carry row, which a final adder then combines quickly.
Question 4: Which design technique allows an ALU to begin processing new operands before the previous result is complete?
- Superscalar execution
- Pipelining (Correct answer)
- Branch prediction
- Out-of-order execution
Correct answer: Pipelining
Pipelining splits the ALU operation into stages so a new operation can enter stage 1 while the previous operation is still in later stages.
Question 5: What is meant by 'functional completeness' in the context of an ALU's logic unit?
- The ALU supports all 64-bit operations
- The set of logic operations provided can implement any possible Boolean function (Correct answer)
- The ALU has no bugs
- The ALU handles both integers and floats
Correct answer: The set of logic operations provided can implement any possible Boolean function
A functionally complete set (e.g., {NAND} alone) can implement any Boolean expression; an ALU's logic unit should include enough operations to compose any function.
Question 6: In a RISC processor ALU, why are operations typically limited to register-to-register only?
- RISC CPUs have no memory bus
- Separate load/store instructions handle memory access, keeping ALU operations fast and simple (Correct answer)
- Registers hold more bits than memory
- RISC ALUs cannot address memory
Correct answer: Separate load/store instructions handle memory access, keeping ALU operations fast and simple
The RISC load/store architecture separates memory access from computation, allowing the ALU to execute at full speed using only register values.
ALU 101 ALU Design and Architecture 1
What distinguishes a combinational ALU from a sequential ALU?